Supervisory Control Synthesis of Timed Automata Using Forcible Events

This paper presents an algorithm for synthesizing a supervisor timed automata (TA) using the conventional supervisory control theory. The is directly applicable to TA without explicit transformation into finite automata, and iteratively strengthens guards of edges labeled by controllable events invariants locations where progression time can be preempted forcible events. synthesized supervisor, also TA, controllable, maximally permissive, guarantees non-blocking safe supervised plant. use real-valued clocks in makes it practical modeling framework, however, infinite state space brings challenges. proposed addresses these providing synthesis method that avoids state-space explosion loss information result from abstraction real-time values.